1. Field of the Invention
The present invention generally relates to the semiconductor fabrication process, and more particularly to a method for fabricating silicide.
2. Description of the Prior Art
As the semiconductor processing dimensions are scaled down, the parasitic resistance such as contact and sheet resistance increases. To reduce such parasitic resistance, the silicide process attracted much attention. Among various suicides, cobalt silicide (CoSi2) and titanium silicide (TiSi2) are the most attractive and studied. They can be applied to the SALIDE (self-aligned silicide) process and show the lowest resistivity among the various silicides. For the improvement of thermal stability, epitaxially grown silicide films are required.
The prior art fabrication sequence is shown in FIG. 1A to 1D. FIG. 1A shows the basic semiconductor structure 101, which comprises a substrate 102 with two doped regions 103A,103B, a gate electrode 104 having an upper surface and side surfaces, a spacer 105 on each side surface of the gate electrode 104 leaving a portion of the doped regions 103A,103B exposed, and insulation devices 106A,106B blocking other semiconductor structures. FIG. 1B shows the depositing of epitaxial silicon 111 on the exposed portions of the doped regions 103A,103B and on the upper surface of the gate electrode 104, with substantially less epitaxial silicon and contamination 112 attached on the spacer 105 and insulation devices 106A, 106B. FIG. 1C shows the depositing of metal cobalt (Co) layer 121 on the epitaxial silicon 111. Finally, FIG. 1D shows the heating process. Furthermore, rapid thermal annealing (RTA) is extensively used in the silicidation or silicide formation step. And the cobalt silicide (CoSi2) 131 is silicided on the epitaxial silicon 111.
By referring to FIG. 1D, the formation of a thick silicide layer causes a high junction leakage current and low reliability. The formation of a thick silicide consumes crystalline silicon from the underlying semiconductor substrate such that the thick silicide layer approaches, thereby generating a high junction leakage current. Moreover, the silicide 131 on the spacer 105 causes a bridging leakage. And it causes current leakage from the gate electrode 104 to the doped regions 103A, 103B.